System and CPU Architecture, 8051 and ARM

In Von Neumann architecture, both data and instructions:

• Use separate memory units
• Use the same memory and bus
• Are stored in CPU registers
• Are not stored at all

Answer explanation

Von Neumann architecture uses shared memory and bus for data and instructions.

What is a key limitation of Von Neumann architecture?

• Expensive hardware
• Complex programming model
• Von Neumann bottleneck due to shared bus
• Too many instruction sets

Answer explanation

The shared bus causes bottleneck limiting data throughput.

Which architecture uses separate buses for data and instructions?

• RISC
• Von Neumann
• Harvard
• ARM

Answer explanation

Harvard architecture separates instruction and data buses for simultaneous access.

Which of the following best describes RISC architecture?

• Complex instructions with fewer lines of code
• Fewer instructions executed rapidly
• Instructions that perform multiple tasks
• No need for a control unit

Answer explanation

RISC uses simple instructions to allow faster execution.

In CISC architecture, an instruction can:

• Be executed in one clock cycle
• Perform multiple operations in a single instruction
• Only perform arithmetic operations
• Use only 8-bit data

Answer explanation

CISC instructions can perform complex operations in one instruction.

Which processor type is known for microprogrammed control units?

• RISC
• ARM
• CISC
• Harvard

Answer explanation

CISC processors often use microprogrammed control for complex instruction sets.

A primary benefit of RISC architecture is:

• Fewer registers
• Simple hardware design and pipelining
• Higher instruction decoding time
• Slower performance per instruction

Answer explanation

RISC's simplicity allows efficient pipelining and faster execution.

ARM processors are based on:

• CISC
• Von Neumann
• Harvard
• RISC

Answer explanation

ARM is a RISC-based architecture designed for efficiency.

What is the major design goal of CISC processors?

• Hardware simplification
• Minimal memory use
• Reduced number of instructions per program
• Software-controlled pipelines

Answer explanation

CISC reduces program size by using complex instructions.

RISC instructions typically have:

• Variable-length format
• Complex addressing modes
• Uniform instruction length
• In-built microcode

Answer explanation

Uniform instruction length simplifies instruction decoding in RISC.