EC3058D-Quiz1

EC3058D-Quiz1

University

6 Qs

quiz-placeholder

Similar activities

Understanding Resistance in Circuits

Understanding Resistance in Circuits

University

10 Qs

Engineering Problem-Solving Concepts

Engineering Problem-Solving Concepts

6th Grade - University

10 Qs

Smart Buildings Lecture 2

Smart Buildings Lecture 2

University

5 Qs

Exploring Digital Electronics Concepts

Exploring Digital Electronics Concepts

University

10 Qs

Power Electronics Quiz

Power Electronics Quiz

University

10 Qs

Electronics Lab Experiments

Electronics Lab Experiments

University

8 Qs

Fundamentals of Electronic Machine Maintenance

Fundamentals of Electronic Machine Maintenance

University

11 Qs

Quiz 1

Quiz 1

University

10 Qs

EC3058D-Quiz1

EC3058D-Quiz1

Assessment

Quiz

Engineering

University

Hard

Created by

Dhanaraj K J

FREE Resource

6 questions

Show all answers

1.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Flexible, Wearable and Portable Electronic Devices demand -----------------------

High speed circuits

Ultra low power circuits

Large area circuits

High Noise tolerant circuits

2.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

The current in MOSFET is mainly-------------

Bulk current

Diffusion current

Drift current

Reverse bias current

3.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Substrate bias effect in MOSFET is also known as---------------

Source transformation effect

Drain induced barrier lowering effect

Pinch off effect

Back gate effect

4.

MULTIPLE CHOICE QUESTION

1 min • 1 pt

Media Image

Triode region

Saturation region

Cut off region

Active region

5.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

For a CMOS inverter to have switching threshold VM =VDD/2, the theshold voltages of PMOST and NMOST should be same

True

False

6.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

In a resistive load inverter, static power dissipation is non zero. This is due to ----------------

active pull up path when output is logic high

active pull down path when output is logic high

active pull up path when output is logic low

active pull down path when output is logic low