COA_QUIZ_UNIT I

COA_QUIZ_UNIT I

University

20 Qs

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COA_QUIZ_UNIT I

COA_QUIZ_UNIT I

Assessment

Quiz

Computers

University

Hard

Created by

BHAIRVEE SINGH

Used 20+ times

FREE Resource

20 questions

Show all answers

1.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

In a computer system, which of the following is NOT typically a function of the bus? (GATE 2021)

Data transfer between CPU and memory.

Control signal transmission between I/O devices and CPU.

Execution of arithmetic operations.

Addressing of memory locations.

2.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What is the primary purpose of bus arbitration in a multiprocessor system?

To ensure memory is not accessed simultaneously by multiple processors.

To manage the communication between I/O devices.

To control the execution of instructions in the CPU.

To determine which processor has control of the bus at any given time.

3.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Which of the following best describes a "stack organization" in computer architecture? (GATE 2019)

Data is stored in a sequential manner and accessed by address.

Data is organized in a Last-In-First-Out (LIFO) manner.

Data is stored in fixed-size blocks with direct access.

Data is organized in a First-In-First-Out (FIFO) manner.

4.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Given a 16-bit address bus, what is the maximum number of memory locations that can be addressed?

64K

128K

256K

512K

5.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Which addressing mode uses the content of a register to hold the address of the data? (GATE 2017)

Immediate addressing

Direct addressing

Indirect addressing

Register addressing

6.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

In a computer system, which bus is responsible for carrying control signals like read and write operations? (GATE 2022)

Address bus

Data bus

Control bus

Status bus

7.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

How is the "general register organization" typically implemented in a CPU (GATE 2020)

With a single register used for all operations

With a set of registers for general-purpose use by instructions

With a dedicated register for each instruction

With a stack of registers

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