
Computer Orgnauzation_Module 02_Daily Test 03

Quiz
•
Computers
•
12th Grade
•
Hard
Vigneshwaran Pandi
FREE Resource
12 questions
Show all answers
1.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
1. What is an interrupt in the context of computer organization?
A hardware failure
A signal generated by the CPU to initiate I/O operations
A mechanism to temporarily stop the execution of a program and transfer control to another part of the system
A type of memory error
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
2. Which hardware component is responsible for generating interrupts in response to external events?
Memory
CPU
Interrupt Controller
I/O Devices
3.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
3. What is the purpose of the interrupt vector in the context of interrupts?
To store the address of the next instruction to be executed after the interrupt is handled
To store the address of the interrupt service routine (ISR)
To manage memory hierarchy during interrupts
To control the execution of the program
4.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
4. Which type of interrupt cannot be ignored by the CPU and requires immediate attention?
Maskable interrupt
Non-maskable interrupt
Software interrupt
External Interrupt
5.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
5. What is the role of the interrupt request (IRQ) line in the context of interrupt hardware?
To initiate I/O operations
To indicate the priority of interrupts
To carry the interrupt signal from devices to the interrupt controller
To store the interrupt vector
6.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
6. In a priority-based interrupt system, how are multiple interrupt requests resolved?
By the order in which they are received
By the priority level assigned to each interrupt
By the CPU speed
By the interrupt vector value
7.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
7. What is the purpose of the interrupt acknowledge signal in the interrupt handling process?
To acknowledge the receipt of an interrupt request
To initiate I/O operations
To indicate the priority of interrupts
To carry the interrupt signal from devices to the interrupt controller
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