
CSC 205 midterm exam
Authored by Joseph Kim
Computers
University
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39 questions
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1.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
An abstract interface between the hardware and the lowest-level software that encompasses all the information necessary to write a machine language program that will run correctly, including instructions, registers, memory access, I/O, and so on.
cache
ABI
Instruction Set Architecture
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Average number of clock cycles per instruction for a program or program fragment.
Instruction count
Clock cycles per instruction (CPI)
Performance period
Clock period
3.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Chip manufacturing process begins with a silicon _____.
wafer
die
ingot
4.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
The reason for the recent slowing of clock rate improvement known a the power wall is that we have run into the practical power limit for cooling.
true
false
5.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
_____ memory has the longest access time.
DRAM
Flash
Disk
6.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
A display technology using a thin layer of liquid polymers that can be used to transmit or block light according to whether a charge is applied.
raster refresh buffer
Liquid crystal display
pixel
coordinate
7.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
A form of nonvolatile secondary memory composed of rotating platters coated with a magnetic recording material
Cache
Magnetic Disk
Flash Memory
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