Quiz 1 Digital IC Design

The output of a primitive must be first in the list of ports.

• Yes

• No

HDL

• Hardware description level

• Hardware description language

Easy to read and write

• VHDL

• Verilog

Verilog based on C programming, VHDL based on ADA

• Correct

• Wrong

Why HDL is important?

• can write without sticking to any technology

• avoid schematic drawing

Different between RTL and behavioral modeling

• RTL uses always, behavioral uses assign

• RTL uses assign, behavioral uses always

// and /* */ symbol of:

• compulsory before start design

• comments

semicolon compulsory for endmodule

• Correct

• Wrong

Verilog is not case sensitive

• Correct

• Wrong

NMJ 32303 lecturer name:

• Mazle Bin Mazalan

• Mazlee Bin Mazalan

• Mazlee Bin Mazlan