Combinational MOS Logic Circuits Quiz

Which of the following best describes a combinational logic circuit?

• Depends on clock input

• Stores state information

• Output depends only on current inputs

• Requires feedback loop

In NMOS logic, which network typically implements the logic function?

• Pull-up network

• Pull-down network

• Feedback network

• Clocked PMOS network

The basic building block of MOS logic circuits is the:

• Resistor

• Capacitor

• MOSFET

• Diode

Which of the following is a disadvantage of NMOS-only logic gates?

• High noise margin

• Large static power dissipation

• Symmetrical VTC

• Rail-to-rail swing

CMOS combinational logic is preferred over NMOS logic because:

• It is easier to fabricate

• It has lower propagation delay

• It consumes no static power

• It uses only NMOS transistors

Which logic family uses both NMOS and PMOS transistors to implement logic functions?

• RTL

• NMOS

• CMOS

• TTL

What is the output of a CMOS inverter when the input is logic '0'?

• High impedance

• Logic '0'

• Logic '1'

• Undefined

In a combinational CMOS logic gate, which condition ensures minimal power consumption?

• When both PMOS and NMOS conduct simultaneously

• When the output is switching

• When the output is static (logic high or low)

• When both PMOS and NMOS are OFF

Which of the following logic expressions is implemented by connecting NMOS transistors in series?

• A + B

• A · B

• A ⊕ B

• A NAND B

Which feature is NOT typically associated with CMOS logic gates?

• High noise immunity

• Low static power

• Static memory

• Rail-to-rail output