GCSE OCR - System Architecture

GCSE OCR - System Architecture

9th Grade

123 Qs

quiz-placeholder

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GCSE OCR - System Architecture

GCSE OCR - System Architecture

Assessment

Quiz

Computers

9th Grade

Hard

Created by

Charlotte Potts

Used 1+ times

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123 questions

Show all answers

1.

DRAG AND DROP QUESTION

1 min • 3 pts

The CPU (Central Processing Unit) continually

(a)   , ​ (b)   and ​ (c)   instructions.

fetches
decodes
executes
acquires
decrypts
encodes

2.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

In Von Neumann architecture, the part that stores the address of the location in memory for data to be fetched from or sent to is...

Memory Address Register (MAR)
Storage Address Register (SAR)
Location Pointer Register (LPR)
Data Address Register (DAR)

3.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

The part of the CPU that carries out arithmetic calculations and logical decisions is ...

Input/Output (I/O)
Arithmetic Logic Unit (ALU)
Random Access Memory (RAM)
Central Processing Unit (CPU)

4.

DRAG AND DROP QUESTION

1 min • 2 pts

Cache memory sits between the processor and main memory (RAM). The ​ (a)   looks into the cache for required data. If it is not there, it requests it from ​ (b)   . The data is moved into cache before being accessed by the CPU.

CPU
RAM
Register
Hard Drive
Motherboard
Graphics Card
SSD
Network Card

5.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

In Von Neumann architecture, the part that stores the address of the next instruction to be processed is the...

Program Counter (PC)
Random Access Memory (RAM)
Central Processing Unit (CPU)
Memory Address Register (MAR)

6.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

In Von Neumann architecture, the part that stores data fetched from memory or to be sent to memory is...

Central Processing Unit (CPU)
Input/Output (I/O) devices
Control Unit (CU)
Memory Data Register (MDR)

7.

DRAG AND DROP QUESTION

1 min • 3 pts

The CPU works at high speeds governed by the clock chip. The ​ (a)   the clock, the more ​ (b)   that can be completed per ​ (c)   .

faster
instructions
second
slower
minute
decodes

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