G9 L2 MINI

What is the first stage of the Fetch-Decode-Execute cycle?

• Decode

• Execute

• Fetch

• Store

Which register holds the address of the next instruction to be fetched?

• MDR

• MAR

• PC

• ACC

During the Fetch stage, where is the memory address of the next instruction first stored?

• Memory Address Register (MAR)

• Memory Data Register (MDR)

• Accumulator (ACC)

• Control Unit

What is the purpose of the Memory Data Register (MDR)?

• Stores the address of the next instruction

• Temporarily holds data or instructions fetched from memory

• Performs calculations

• Controls the execution of instructions

What happens during the Decode stage of the FDE cycle?

• The instruction is retrieved from memory

• The instruction is interpreted and necessary components are activated

• The instruction is executed

• The result is stored in memory

Which CPU component is responsible for interpreting the instruction during the Decode stage?

• ALU

• Control Unit

• Accumulator

• Data Bus

What happens during the Execute stage?

• The CPU interprets the instruction

• The CPU performs the operation required by the instruction

• The instruction is stored in memory

• The address of the next instruction is retrieved

Which register is used to store results of calculations?

• MAR

• PC

• MDR

• ACC

What does the Address Bus do?

• Transfers control signals

• Transfers memory addresses between components

• Transfers data between CPU and memory

• Stores results of calculations

Which bus is responsible for carrying data between the CPU and memory?

• Control Bus

• Address Bus

• Data Bus

• Program Counter