Unit-1 8085 Architecture ( Assessment Test )

How many flags are present in the 8085 microprocessor?

• 3
• 5
• 6
• 8

Which of the following is not a flag in the 8085 microprocessor?

• Zero (Z) flag
• Carry (CY) flag
• Overflow (OF) flag
• Parity (P) flag

What does the Parity (P) flag indicate in the 8085?

• Carry generation
• The number of 1s in the result is even or odd
• Negative result
• Overflow

What will be the status of the Zero (Z) flag after executing the following instructions? MVI A, 00H ORA A

• Z = 1
• Z = 0
• Z = Indeterminate
• None of theanswers

MVI A, 85H ADD A After execution, which flags will be set if the result is 0AH?

• CY = 0, Z = 0, P = 1
• CY = 1, Z = 0, P = 1
• CY = 0, Z = 1, P = 0
• CY = 1, Z = 1, P = 0

The ALE (Address Latch Enable) signal in the 8085 microprocessor is active during which T-state?

• T2 of the Memory Read cycle
• T3 of the Instruction Decode cycle
• T1 of the Opcode Fetch cycle
• T2 of the Data Write cycle

In a timing diagram, what is indicated by the falling edge of the ALE signal?

• End of instruction
• Beginning of the Address phase
• Completion of the Data phase
• End of the Address phase

Which of the following represents the correct sequence of an instruction cycle?

• Execute → Fetch → Decode
• Fetch → Decode → Execute
• Execute → Decode → Fetch
• Decode → Fetch → Execute

How many T-states are required for the Opcode Fetch machine cycle in the 8085 microprocessor?

• 2
• 3
• 4
• 6

What is the relationship between the Instruction Cycle, Machine Cycle, and T-States?

• Instruction Cycle > Machine Cycle > T-State
• T-State > Machine Cycle > Instruction Cycle
• Instruction Cycle = Machine Cycle + T-State
• T-State = Instruction Cycle × Machine Cycle