EN QUIZ 2

In SPI protocol,-------signal is generated by Master to  select individual slave/peripheral devices

• Slave Select(SS)

• Master In Slave Out (MISO)

• Serial Clock(SCK)

• Master Out Slave In (MOSI)

In SPI protocol, if the phase of the clock is zero data is latched at the ------- of the clock with clock polarity = 0

• High Level

• Low level

• Rising edge

• Falling edge

------ version of PCI bus Introduces Error Correction Codes mechanism to improve robustness and data integrity

• PCI-X 1.0

• PCI Express

• PCI 2.1

• PCI-X 2.0

IrDA uses a bit-encoding scheme known as----  to distinguish between a logic 0 and a logic 1 during transmission

• RZ

• NRZ

• Manchester

• NRZI

The basic purpose of IrDA is  

• to provide device-to-device communication over short distances

• to provide device-to-device communication over long distances

• to provide point to multipoint communication over short distances

• to provide point to multipoint  communication over long distances

The ---------------specification details the hardware layer, including requirements for modulating the outputs of UARTs prior to transmission in IrDA protocol

• IrPHY

• IrLAP

• IrCOMM

• IrOBEX

In I2C,START condition is indicated when the master-chip activates---- 

• First the clock line (SCL) low, and next the data line (SDA)  low

• First the data line (SDA) low, and next the clock line (SCL)  low

• First the clock line (SCL) high, and next the data line (SDA)  high

• First the data line (SDA) high, and next the clock line (SCL)  high

Serial to Peripheral Interface (SPI) is a hardware/firmware communications protocol developed by----------------

• intel

• Bosch

• Motorola

• Philips

In I2C protocol, general call address is represented by the binary number---

• %00000000

• %00000110

• %00000100

• %11111111

I2C also supports an extended 10-bit addressing mode, allowing up to -----peripherals.

• 112

• 127

• 512

• 1,024