Digital system design

In clock signal 0 to 1 transition is called

• • - ve edge

• • +ve edge

• Level

• Falling edge

A single Flip flop is a

• 1 bit storage

• 2 bit storage

• Combinational circuit

• n bit storage

In RS flip flop R= 0 S=0 and Q(t)=1 then the next state Q(t+1)=

• 0

• X

• Z

• 1

Which of the following flip flop has toggle condition

• JK

• RS

• SR

• D

Which of the following is data selector

• Demux

• Mux

• Adder

• Decoder