Characteristics of RAM memory in general

[<$>] No data loss when there is no power supply

[<$>] Allows writing/reading data simultaneously at a memory location

What is the structure of a DRAM memory cell?

[<$>] Includes a capacitor and a Transistor

[<$>] Includes two capacitors and two transistors

[<$>] Includes two capacitors and one Transistor

Regarding the method of writing data to Cache, which of the following statements is false?

[<$>] Write-back writing speed is slow because you have to find out whether the corresponding Block in the Cache has been replaced or not

[<$>] Write-through (Write-through) slow writing speed because it must write to both Cache and main memory simultaneously

[<$>] Write-back is only written to the Cache. When the corresponding Block in the Cache is replaced, the entire Block is written back to main memory.

[<$>] Write- through is writing to both Cache and main memory simultaneously

Regarding RAM memory, which of the following statements is false:

[<$>] Is a type of non-volatile memory

[<$>] Is arbitrary read/write memory

[<$>] There are two types of RAM: SRAM and DRAM

[<$>] Is a place to temporarily store information during program execution

Given a SRAM memory chip with a memory capacity of 64K x 8bit, which of the following statements is correct?

[<$>] Address lines from A 0 -> A 15

[<$>] Data lines from D 0 -> D 15

[<$>] Data lines from D 0 -> D 8

[<$>] Address lines from A 0 -> A 7

Which of the following statements about PROM is correct?

[<$>] Needs specialized equipment to record with the program, users cannot erase data

[<$>] Data is pre-loaded by the manufacturer, the user cannot delete the data

[<$>] Users can erase data with a device that uses ultraviolet rays and recharge data with electricity

[<$>] Users can load or delete data using electricity

Regarding ROM memory, which of the following is not true?

[<$>] Always has a larger capacity than RAM memory

Compared to internal memory, the external memory of a computer has the following advantages:

[<$>] Low cost per bit of memory

Characteristics of Cache memory are:

[<$>] Allows faster access than DRAM memory

[<$>] Has a larger capacity than RAM memory

[<$>] Allows faster access than CPU registers

In terms of function, a computer memory system can be found in the following locations:

[<$>] Inside the CPU (registers), internal memory, external memory

[<$>] Registers, ROM, magnetic tape

[<$>] Inside the processor, RAM, magnetic disk

[<$>] Registers , internal memory, CD-ROM

Considering the computer memory system hierarchy, which of the following statements is false?

[<$>] The register level is the slowest exchange level

[<$>] Cache level is an intermediate level between CPU and RAM

[<$>] The register level is the fastest exchange level

[<$>] Cache level is the level closest to the register

ROM memory is memory:

[<$>] Allows writing/reading data simultaneously at a memory location

[<$>] Allows recording data during program execution

[<$>] Data lost when there is no power supply

Memory capacity is determined by

[<$>] The number of bits or words that the memory can store

[<$>] Number of memory modules in memory

[<$>] Number of data bits transferred by memory per unit of time

[<$>] Number of data wires on the memory access data bus

Regarding ROM memory, which of the following statements is correct:

[<$>] Made from Transistor or diode

Regarding Cache memory, which of the following statements is correct?

[<$>] Cache can be placed on the same chip as the CPU

[<$>] Main memory is faster than Cache

[<$>] Cache memory cannot be placed on the same chip as the CPU

[<$>] Cache memory is located between main memory and external memory

Given a SRAM memory chip with signals A 0 -> A 13 , D 0 -> D 15 , RD, WR, which of the following statements is false?

[<$>] WE is the data read control signal

[<$>] WE is the data write control signal

[<$>] RD is the data read control signal

[<$>] The capacity of the chip is 32KB

Which of the following is not an advantage of external memory compared to the computer's main memory:

[<$>] Memory access speed is usually very high

[<$>] No data loss when power is lost

Given a SRAM memory chip with a memory capacity of 16K x 8bit, which of the following statements is correct?

[<$>] There are 14 address lines

[<$>] Data lines from D 0 -> D 8

[<$>] Address lines from A 0 -> A 14

In the exchange between Cache and main memory, which of the following statements is false?

[<$>] Main memory is divided into memory lines

[<$>] Main memory is divided into memory blocks

[<$>] Cache is divided into memory lines

[<$>] The Line size is equal to the Block size

What is the structure of a SRAM memory cell?

[<$>] Is a flip-flop circuit consisting of six transistors

[<$>] Is a flip-flop circuit consisting of three capacitors and two transistors

[<$>] Is a charged circuit consisting of four capacitors and two transistors

[<$>] Is a charged circuit consisting of two capacitors and three transistors

Regarding ROM memory, which of the following statements is correct:

[<$>] EPROM is a type of ROM that can be erased and rewritten many times

[<$>] Can use electricity to erase EPROM

[<$>] PROM is a type of ROM that can be erased and rewritten many times

[<$>] Can use electricity to erase PROM

Regarding the method of accessing the memory system, which of the following statements is false?

[<$>] Sequential access to Cache memory

[<$>] Direct access to magnetic disk

[<$>] Random access to internal memory

[<$>] Associative access to Cache memory

Which of the following statements about EPROM is correct?

[<$>] Users can erase data with a device that uses ultraviolet rays and recharge data with electricity

[<$>] Data is pre-loaded by the manufacturer, the user cannot delete the data

[<$>] Needs specialized equipment to record with the program, users cannot erase data

[<$>] Users can load or delete data using electricity

Regarding Cache memory, which of the following statements is correct?

[<$>] Data transmission between CPU and Cache in units of memory words

[<$>] External memory receives entire blocks of data from Cache

[<$>] Data transfer between CPU and Cache in memory block units

[<$>] When needed, the CPU receives data directly from main memory

Considering the computer memory system hierarchy, which of the following statements is correct?

[<$>] From external memory to capacity register decreases

[<$>] From register to processor speed increases gradually

[<$>] From internal memory to Cache memory, the cost/1bit gradually decreases

[<$>] From Cache memory to external memory, the speed gradually increases

Regarding RAM memory, which of the following statements is correct:

[<$>] Is the place where information is stored that the computer is processing

[<$>] RAM stands for Read Access Memory

[<$>] Is a type of non-volatile memory

[<$>] SRAM is made from capacitors

Characteristics of ROM memory are

[<$>] The content has not been changed

[<$>] Stores more information than RAM memory

[<$>] Allows faster access to RAM memory

pahc 5.1

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MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Given a computer with main memory capacity of 256MB, Cache memory capacity of 64KB, Line size of 64bytes, memory compartment length of 4bytes. In the case of the direct mapping technique of the Tag + Line + Word address format emitted by the processor to access the Cache is:

[<$>] 11+11+5

[<$>] 12+11+4

[<$>] 12+12+3

[<$>] 11+12+4

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

With an SRAM memory chip with a 24-line address bus and an 8-line data bus, what is the maximum capacity of memory management?

[<$>] 32 MegaBytes

[<$>] 8 MegaBytes

[<$>] 64 MegaBytes

[<$>] 16 MegaBytes

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

In the 2 N × M memory structure , which of the following statements is correct?

[<$>] Memory includes 2^ N memory words and M memory modules

[<$>] Memory consists of 2^ N memory cells, each memory cell contains M bits

[<$>] Memory includes 2^ N Bytes and M memory modules

[<$>] Memory includes 2^ N memory words and M memory modules

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Given a computer with main memory capacity of 4GB, cache memory capacity of 512KB, line size of 32bytes, memory compartment length of 1 byte. In the case of the direct mapping technique of the Tag + Line + Word address format emitted by the processor to access the Cache is:

[<$>] 13+5+14

[<$>] 5+14+13

[<$>] 14+13+5

[<$>] 13+14+5

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Cache memory works thanks to the principle:

[<$>] Operating principles of computers

[<$>] Data recording control principle

[<$>] Localize memory reference

[<$>] Principle of controlling data reading

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

With a SRAM memory chip with n address lines and m data lines, the capacity of the chip is:

[<$>] 2 ^mxn bytes

[<$>] 2 ⁿxm bytes

[<$>] 2 ^mxn bits

[<$>] 2 ⁿxm bits

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Considering Cache memory, which of the following address mapping techniques are there?

[<$>] Direct, full link, aggregate link

[<$>] Direct, continuous link, intermittent link

[<$>] Collection link, element link, union link

[<$>] Direct, indirect, combined

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pahc 5.1

Given a computer with main memory capacity of 256MB, Cache memory capacity of 64KB, Line size of 64bytes, memory compartment length of 4bytes. In the case of the direct mapping technique of the Tag + Line + Word address format emitted by the processor to access the Cache is:

With an SRAM memory chip with a 24-line address bus and an 8-line data bus, what is the maximum capacity of memory management?

In the 2 N × M memory structure , which of the following statements is correct?

Given a computer with main memory capacity of 4GB, cache memory capacity of 512KB, line size of 32bytes, memory compartment length of 1 byte. In the case of the direct mapping technique of the Tag + Line + Word address format emitted by the processor to access the Cache is:

Cache memory works thanks to the principle:

With a SRAM memory chip with n address lines and m data lines, the capacity of the chip is:

Considering Cache memory, which of the following address mapping techniques are there?

With a SRAM memory chip with a 32-line address bus and a 16-line data bus, what is the maximum capacity of memory management?

Main memory is usually composed of which of the following memory elements?

Characteristics of RAM memory in general

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