CPU Architecture - DG

What is a collection of wires called that sends data and addresses around the CPU?

• A bus

• A connection

• A link

• A cable

What register is connected directly to the data bus?

• Memory Address Register

• Memory Data Register

• Program Counter

• Current Instruction Register

Which of these is NOT a stage of the FDE cycle?

• Fetch

• Execute

• Decide

• Decode

What is the part of the CPU called that performs calculations?

• ALU

• Control Unit

• Program Counter

• Memory

Inside the CPU, you will find:

• ALU, CU, registers, cache memory

• ADU, PC, storage, RAM memory

• ARM, PC, controller, cache memory

• APM, CU, time signal, RAM memory

The ALU....

• does any maths or logic problems for the CPU

• stores data inside the CPU

• sends out control signals for the CPU

• holds specific data for the fetch-decode-execute cycle

The CU...

• does any maths or logic problems for the CPU

• stores data inside the CPU

• sends out control signals for the CPU

• holds specific data for the fetch-decode-execute cycle

The cache memory...

• does any maths or logic problems for the CPU

• stores frequently used instructions close to the CPU

• sends out control signals for the CPU

• holds specific data for the fetch-decode-execute cycle

To get data from RAM, memory addresses are sent from the CPU down the...

• bus.

• registers.

• ROM.

• cache.

Clock speed measures what?

• Speed at which instructions are fetched from main memory
• Time taken to perform a single Fetch-Decode-Execute cycle
• Number of Fetch-Decode-Execute cycles that can be completed in 1 sec
• Speed at which instructions are decoded