22UCS303C-23-24-quiz

The transfer between CPU and cache is _______.

• a) Block transfer  

•    b) Word transfer   

• c) Set transfer   

•   d) Associative transfer

When a subroutine is called, address of the instruction following the call instruction are stored in

• a) Stack pointer   

•   b) Accumulator  

•     c) Program counter   

• d) Stack

To hold the results of intermediate stages in pipelining, ______ are used.

• a) Caches   

•   b) Buffers  

• c) Memory   

• d) RAM units

What does CSA stands for?

• a) Computer Service Architecture
  

• 
  b) Computer Speed Addition
  

• 
  c) Carry Save Addition
  

• 
  d) None of the mentioned

To reduce the memory access time we generally make use of ______

• a) SDRAM’s
  

• 
  b) Heaps
  

• 
  c) Cache’s
  

• 
  d) Higher capacity RAM’s

  -21 can be written as (a)   using Booths coding method using six bit representation

Which of the following register keeps track of the instructions stored in the program stored in memory?

• 1. a) Accumulator

• 2. b) Address Register

• 2. c) Program Counter

• 2. d) Index Register

CISC stands for -

• 1. a) Complex Instruction Set Computer

• 2. b) Complete Instruction Sequential Compilation

• 2. c) Complex Instruction Sequential Compiler

• 2. d) None of the above

I_.

If memory is 64MB (byte addressable), number of bits in address are ___.

• a) 6

• b) 16

• c) 26

• d) 32

The effectiveness of the cache memory is based on the property of ________

• a) Locality of reference
  

• 
  b) Memory localisation
  

• 
  c) Memory size
  

• 
  d) None of the mentioned