In the ARM architecture, the link register is defined as ___ register

Q1 and Q2, Computer Architecture review

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Medium
Константин Литвинов
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76 questions
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1.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
R14
R15
R13
R18
2.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
Which type of issue does occur when the pipeline or portion of the pipeline must stall because conditions do not permit continued execution
Pipeline hazard
Pipeline bubble
Pipeline misleading
Pipeline halt
3.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
This instruction uses as one of the operands the address of the next instruction to be executed
I/O instruction
Multiply instruction
Branch instruction
Add instruction
4.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
What is the type of addressing mode given by the algorithm EA = A?
Register indirect
Direct
Register
Indirect
5.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
List main components of a CPU
ALU, system bus, control unit
ALU, registers, control unit
ALU, registers, internal CPU bus
ALU, control unit, control paths
6.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
Thumb instructions are unconditional, so the condition code field is not used. True or False?
False
True
7.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
This register contains the instruction most recently loaded
PC
IR
MBR
MAR
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