
OCR CS A Level - 1.1.1 Structure and Function of the Processor 2
Authored by Ana Bracher
Computers
12th Grade
Used 2+ times

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1.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is the function of the Arithmetic and Logic Unit (ALU) in a processor?
Completing arithmetical and logical operations
Storing data temporarily
Managing the flow of data between the CPU and other devices
Directing operations inside the CPU
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which register holds the address of the next instruction to be executed?
Program Counter (PC)
Memory Data Register (MDR)
Accumulator (ACC)
Memory Address Register (MAR)
3.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is the purpose of the Control Bus in a processor?
Writing data into the addressed location
Requesting access to the CPU
Transmitting memory addresses
Transmitting control signals between internal and external components
4.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is the function of the Address Bus in a processor?
Transmitting control signals between internal and external components
Writing data into the addressed location
Requesting access to the CPU
Transmitting memory addresses
5.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is the purpose of pipelining in a processor?
To complete arithmetical and logical operations
To temporarily store data
To manage the flow of data between the CPU and other devices
To reduce the amount of the CPU which is kept idle
6.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is the advantage of Harvard Architecture over Von Neumann Architecture?
Cheaper to develop since the control unit is easier to design
Physically separate memories for instructions and data
Shared memory and data bus used for both data and instructions
Programs can be optimised in size
7.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is the purpose of the Fetch Phase in the fetch-decode-execute cycle?
To copy the address from the PC to the MAR
To copy the instruction held at the address to MDR
To increase the contents of the PC by 1
To copy the value held in the MDR to the CIR
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