PGDVLSI SEPT 2023 CDAC NOIDA Class Assignment

The next state of a two bit up counter is shown in the state table. The counter is built as a synchronous circuit using T flip flops. The expression for T1 and T0 are

• 
• 
• 
• 

The functional difference between SR and JK flip flop is that

• JK is faster than SR

• JK has a feedback path

• JK accepts both inputs 1

• All of these

For the circuit shown if the initial state is Q1Q0 = 00 then what is the state after 4 clock cycles ?

• 01

• 11

• 10

• 00

The synchronous circuit shown is initialized to the state Q2,Q1,Q0 = 000. What is the sequence for the next three clock pulses?

• 001,010,011

• 111,110,101

• 100,110,111

• 100,011,001

Consider the circuit and tell the number of distinct states possible.

The minimum number of D flip flops for a MOD 258 counter is

• 8

• 9

• 10

• 12

The final value stored in the shift register after completion of the input is

• 0110

• 1011

• 1100

• 1101

The value of OUT for the circuit is

• always 0

• always 1

• always X

• always X'

A circuit is to designed in such a way that there should be four inputs: three sensors A,B and C and one emergency switch E. Output should be high if emergency switch is pressed or both sensors A and B are high together or both sensors B and C are high together or all three are high together. What is the boolean expression for the output of this circuit?

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