COA_Ch04_Exam

The _______ is responsible for fetching program instructions, decoding each one, and performing the indicated sequence of operations.

• program counter
• pre-processor
• co-processor
• control unit

The _______ connects the CPU to memory.

• backplane bus
• I/O bus
• expansion bus
• system bus

__________ is the process whereby devices connected to a bus autonomously determine which of the devices shall have control over the bus:

• distributed arbitration using self-selection
• centralized parallel arbitration
• daisy chain arbitration
• distributed arbitration using collision detection

The equation below relates seconds to instruction cycles. What goes in the ???? space?

• maximum bytes
• average bytes
• maximum cycles
• average cycles

If, after fetching a value from memory, we discover that the system has returned only half of the bits that we expected; it is likely that we have a problem with:

• the I/O bus
• the system bus
• byte alignment
• the control unit

Suppose that a 64MB system memory is built from 64 1MB RAM chips. How many address lines are needed to select one of the memory chips?

• 6
• 8
• 32
• 64

Suppose a system has a byte-addressable memory size of 4GB. How many bits are required for each address?

• 16
• 24
• 32
• 48

Suppose that a system uses 16-bit memory words and its memory is built from 32 1M × 8 RAM chips. How many address bits are required to uniquely identify each memory word?

• 16
• 24
• 32
• 64

Suppose that a system uses 16-bit memory words and its memory built from 32 1M × 8 RAM chips. How large, in words, is the memory on this system?

• 8M
• 16M
• 32M
• 64M

Suppose we have a 4096-word memory that is 64-way high-order interleaved, what is the size of the memory address offset field?

• 12 bits
• 10 bits
• 8 bits
• 4 bits