COA_Ch04_Pretest

The _______ is a digital logic component that is often used in computer registers.

• control unit
• D flip-flop
• multiplexer
• inverter

A computer bus consists of data lines, __________, control lines, and power lines.

• address lines
• protocol lines
• cycle lines
• master/slave lines

Clock skew is a problem for:

• control buses
• address buses
• asynchronous buses
• synchronous buses

This bus arbitration method can cause throughput delays owing to bottlenecks in the selection process:

• distributed arbitration using self-selection
• centralized parallel arbitration
• daisy chain arbitration
• distributed arbitration using collision detection

This common method used to increase CPU throughput can result in destructive overheating of the CPU:

• resynchronization
• asynchronization
• overclocking
• skewing

Suppose that a 32MB system memory is built from 32 1MB RAM chips. How many address lines are needed to select one of the memory chips?

• 4
• 5
• 8
• 32

Suppose a system has a byte-addressable memory size of 256MB. How many bits are required for each address?

• 8
• 28
• 32
• 48

Suppose that a system uses 32-bit memory words and its memory is built from 16 1M × 8 RAM chips. How many address bits are required to uniquely identify each memory word?

• 16
• 22
• 24
• 32

Suppose that a system uses 32-bit memory words and its memory is built from 16 1M × 16 RAM chips. How large, in words, is the memory on this system?

• 8M
• 16M
• 32M
• 64M

Suppose we have a 1024-word memory that is 16-way low-order interleaved. What is the size of the memory address offset field?

• 12 bits
• 10 bits
• 6 bits
• 4 bits