Unit-5_Latches

Latch is a device with ___________

• One stable state

• Two stable state

• Four stable state

• Three stable state

Latch is a bistable circuit having_________

• two complementary outputs

• One complementary outputs

• Four complementary outputs

• five complementary outputs

clock signal that is transitioning from Logic Low to Logic High, then that type of triggering is known as_________

• Positive edge triggering

• Negative edge triggering

• Positive negative edge triggering

• Negative Positive edge triggering

________is a level triggered device.

• Latches

• JK flip Flop

• RS flip flop

• D flip flop

Sequential circuits are circuits____________.

• that are composed of logic gates that have no feedback from output to input

• that are connected in a logical sequence

• that have two outputs that are always the same

• in which the output logic states and sequence of operations is dependent on both past and present input conditions 

Latch doesn't contains______.

• Output state

• Input state

• Clock

• Inverter

Full form of SR Latch

• Set Reset

• Set ready

• Set Rated

• All

In SR-Latch when the invalid state takes place______.

• When the inputs are low

• When the inputs are high

• When S is high and R is low

• When S is low and R is high