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Processors CISC RISC

Authored by Matt Hunt

Computers

12th Grade

Used 17+ times

Processors CISC RISC
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17 questions

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1.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Which of the following is FALSE about von Neumann architecture?

Data and programs share the same memory.

The programming instructions and data share the same bus.

There is no possibility of data being overwritten by instruction and vice versa.

None of the above.

2.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Why is the speed of a Harvard processor better than that of a von Neumann processor?

More memory is allocated

Because program memory is read-only

Separate buses for program and data enables us to process them simultaneously.

All of the above

3.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

In which of the following parts of memory is Harvard architecture used in modern computers?

Cache

Main Memory

Flash Drive

All types of memory

4.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

True or False: Advanced digital signal processors provide separate buses for read and write operations of data.

True

False

5.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Which of the following processor type has a lower number of instructions?

CISC

RISC

6.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Which of the following processor type is efficient at simpler tasks?

CISC

RISC

7.

MULTIPLE SELECT QUESTION

45 sec • 1 pt

Which of the following is a disadvantage of a CISC processor?

Presence of too many instructions

Compiler’s complicated operation

Higher clock speed

Higher cost (expensive)

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