a-level computer science

a-level computer science

12th Grade

23 Qs

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a-level computer science

a-level computer science

Assessment

Quiz

Created by

Daniel TAIT

Computers

12th Grade

4 plays

Easy

23 questions

Show all answers

1.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

First Step of the FETCH

The CPU reads the contents of the Program Counter to find the address of the next instruction to be fetched

The address in the MAR is then located in RAM

The contents of the RAM address are moved to the MDR

The instruction in the MDR is copied to the CIR

2.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What happens in FETCH immediately after the CPU reads the contents of the Program Counter to find the address of the next instruction to be fetched

The Program Counter is copied to the CIR

The Program Counter is incremented

The contents of the data bus is read

The contents of the MDR is read

3.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

CIR Stands for

Current Instruction RAM

Current Instruction Register

CPU Information Register

Combined Information Register

Combined Instruction Register

4.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

In the EXECUTE stage the result of a calculation is stored in the ..

ALU

MDR

Control Bus

Accumulator

Operand

5.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

The PC contains

Operand

Address

Operator

Data

6.

MULTIPLE SELECT QUESTION

30 sec • 1 pt

Which of these are a type of bus that connects internal components?

Data bus

Address bus

Control bus

Venga bus

7.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Media Image

Which bus is labelled with (a)?

Address Bus

Data Bus

Control Bus

8.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Media Image

Which bus is labelled with (b)?

Address Bus

Data Bus

Control Bus

9.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Which computer system architecture uses separate memory and buses for data and for instructions?

Harvard

Von Neumann

Stanford

Cambridge

10.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Type of memory that is read only and non-volatile

ROM

RAM

Virtual

Cache

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