VLSI - Mock Test

In a MOS transistor, channel width has increased by 2 times. Corresponding change in the resistivity is,

• 4 Times increase

• Doubled

• Reduced by half

• None of these

The following program is executed in an 8085 processor,

MVI A,0A H;

MVI B,04 H;

LOOP: ADD B;

DCR B;

JNZ LOOP;

HLT;

At the end of the program, accumulator contains

• 00 H

• 04 H

• 1A H

• 14 H

A D flip-flop is connected as shown in the figure. The input clock frequency is 100 MHz. What is the possible output frequency?

• 100 MHz

• 150 MHz

• 200 MHz

• 50 MHz

For a TTL circuit, following data are given. V_IH(min) = 2 V, V_IL(max) = 0.8 V, V_OH(min) = 2.5 V and V_OL(max) = 0.4 V. The HIGH level and LOW level noise margins are, respectively

• 0.5 V and 0.4 V

• 0.4 V and 0.5 V

• 2.4 V and 2 V

• None of these

The output F of the shown 4 to 1 Multiplexer is

• $X\overline{Y}$

• $\overline{X}+\overline{Y}$

• $X+Y$

• $XY$

In a standard TTL, ‘totem pole’ stage refers to

• Phase Splitter

• Open Collector Output Stage

• Multi - Emitter Input Stage

• Output Buffer

The NMOS circuit chain shown in the figure can act as a

• Buffer

• NAND Gate

• NOR Gate

• Invertor

In a CARRY LOOK AHAEAD ADDER, carry generate (G)and carry propagate functions (P) can be realized by using

• OR and AND gates respectively

• AND and XOR gates respectively

• NAND and NOR gates respectively

• XOR and XNOR gates respectively

Zener breakdown diodes have breakdown voltage which

• has positive temperature coefficient

• is independent of temperature

• has negative temperature coefficient

• None of these

In a bipolar transistor biased in the forward active region, has base current IB= 50 μA and collector current IC= 2.7 mA. Then α is,

• 0.949

• 1

• 0.982

• 50